JUNCTION FIELD EFFECT TRANSISTOR (JFET)

JFET

INTRODUCTION

The field effect transistor (FET) is a transistor that relies an electric field to control the shape and hence the conductivity of a “channel” in a semiconductor materials. FETs are sometimes used as voltage-controlled resistors. The concepts related to the field effect transistor (BJT). Nevertheless, FETs were implemented only of other BJTs due to the simplicity of manufacturing, BJTs over FETs at the time. The FET is a unipolar transistor and involves only one type of charge carrier (electrons or holes) in their operation.

A junction field effect transistor is a three terminal semiconductor device in which current conduction is by one type of carrier i.e. electrons or holes.
The JFET was developed about the same time as the transistor but it came into general use only in the late 1960s. In a JFET, the current conduction is either by electrons or holes and is controlled by means of an electric field between the gate electrode and the conductivity channel of the device. The JFET has high input impedance and low noise level.

CONSTRUCTIONAL DETAILS
A JFET consist of a p-type or n-type silicon bar containing two pn junctions at the sides as shown in fig. The bar forms the conducting channel for the charge carriers. If the bar is of n-type, it is called an n-channel JFET as shown in fig. and if the bar is of p-type it is called a p-channel JFET as shown in fig. The two pn junctions forming diodes are connected internally and a common terminal called gate is taken out. Other terminals are sources & drain taken out of the bar. This JFET has essentially three terminals, gate (G), source (S), drain (D).

WORKING PRINCIPLE
Fig shows the circuit of n-channel JFET with normal polarities. The circuit action is as follows:
When a voltage VDS is applied between drain and source terminals and voltage on the gate is zero, the two PN junctions at the sides of the bar establish layers. The electrons will flow from source to drain through a channel between the depletion layers. The size of these layers determines the width of the channel and hence the current conduction through the bar.
When a reverse voltage VGS is applied between the gate and source, the width of the depletion layers is increased. This reduces the width of conducting channel, thereby increasing the resistance of n-type bar. Consequently, the current from sources to drain is decreased. On the other hand, if the reverse voltage on the gate is decreased, the width of the depletion layers also decreases. This increases the width of the conducting channel and hence source to drain current.
It is clear from the above discussion that current from source to drain can be controlled by the application of potential (i.e. electric field) on the gate. This reason, the device is called field effect transistor. It may be noted that a p-channel JFET appears in the same manner as an n-channel JFET except that channel current carrier will be the holes instead of electrons and the polarities of VGS and VDS are reversed.

IMPORTANCE OF JFET
A JFET acts like a voltage controlled device i.e. input voltage (VGS) controls the output current. This is different from ordinary transistor (or bipolar transistor) where input current controls the output current. Thus JFET is a semiconductor device acting like a vacuum tube. The need for JFET arises because as modern electronic equipment became increasingly transistorized, it became apparent that there were may functions in which bipolar transistors were unable to replace vacuum tubes. Owing to their extremely high input impedence. JFET devices are more like vacuum tubes than are the bipolar transistors and hence are able to take over many vacuum tube functions. Thus, because of JFET, electronic equipment is closer today to being completely solid state.
The JFET devices have not only taken over the functions of vacuum tubes but they now also threaten to depose the bipolar transistors as the most widely used semiconductor devices. As an amplifier, the JFET has higher input impedence then that of a conventional transistor generates less noise and has greater resistance to nuclear radiations.

DIFFERENCE BETWEEN JFET AND BIPOLAR TRANSISTOR
The JFET differs from an ordinary or bipolar transistor in the following ways:
In a JFET, there is only one type of carrier, holes in p-type channel and electrons in n-type channel. For this reason, it is also called a unipolar transistor. However, in an ordinary transistor, both holes and electrons play part in conduction. Therefore, an ordinary transistor is sometimes called a bipolar transistor.
As the input current (i.e. gate to source) of a JFET is reverse biased, therefore, the device has high input impedence. However, the input circuit of an ordinary transistor is forward biased and hence has low input impedence.
As the gate is reverse biased, therefore it carries vey small current. Obviously, JFET is just like a vacuum tube where control grid (corresponding to gate in JFET) carries extremely small current and input voltage controls the output current. For this reason, JFET is essentially a voltage driven device. However, ordinary transistor is a current operated device i.e., input current controls the output current.
A bipolar transistor uses a current into its base to control a large current between collector and emitter where as a JFET uses voltage on the gate (=base) terminal to control the current between drain (=collector) and source (=emitter). Thus a bipolar transistor gain is characterized by current gain whereas the JFET gain is characterized as a transconductance i.e., the ratio of change in output current (drain current) to the input (gate) voltage.
In JFET, there are no junctions as in as ordinary transistor. The conduction is through an n-type or p-type semiconductor materials. For this reason, noise level in JFET is very small.

JFET AS AN AMPLIFIER
The weak signal is applied between gate and source and amplified output is obtained in the drain source circuit. For the proper operation of JFET, the gate must be negative w.r.t. source i.e., input circuit should always be reverse biased. This is achieved either by inserting a battery VGG in the gate circuit or by a circuit known as biasing circuit. In the present case, we are providing biasing by the battery VGG.
A small charge in the reverse biased on the gate produces a large change in drain current. This fact makes JFET capable of raising the strength of a weak signal. During the positive half of signal, the reverse bias on the gate decreases. This increases the channel width and hence the drain current. During the negative half cycle of the signal, the reverse voltage on the gate increases. Consequently, the drain current decreases. The result is that a small charge in voltage at the gate produces a large change in drain current. These large variations in drain current produce large output across the load RL. In this way, JFET acts as an amplifier.

OUTPUT CHARACTERISTICS OF JFET
The curve between drain current (ID) and drain source voltage (VDS) of a JFET at constant gate source voltage (VGS) is known as output characteristics of JFET. The circuit for determining the output characteristics of JFET at VGS=IV. Repeating similar procedure, output characteristics at other gate source voltage can be drawn.
The following points may be noted from the characteristics.
At first, the drain current ID rises rapidly with drain source voltage VDS but then becomes constant. The drain source voltage above which drain current becomes constant is known as pinch off voltage. Thus
After pinch off voltage, the channel width becomes so narrow that deplection layers almost touch each other. The drain current passes through the small passage between these layers. Therefore increase in drain current is very small with VDS above pinch off voltage. Consequently, drain current remains constant.
The characteristics resemble that of a pentode valve.

IMPORTANT TERMS
In the analysis of a JFET circuit, the following important terms are often used.
Shorted gate drain current (IDSS)
Pinch off voltage(VP)
Gate source cut off voltage (VGSCOFF)
Shorted gate drain current (IDSS)
It is the drain current with source short circulated to gate (i.e. VGS=0) and drain voltage (VDS) equal to pinch off voltage. It is sometimes called zero-bias current.
The JFET circuit with VGS = 0 i.e., source shorted circuited to gate. This is normally called shorted gate condition. The drain current rises rapidly at first and then levels off at pinch off voltage VP. The drain current has now reached the maximum value IDSS. When VDS is increased beyond VP, the depletion layers expand at the top of the channel. The channel now acts as a current limiter and holds drain current constant at IDSS.
The following points may be noted carefully
Since IDSS is measured under shorted gate conditions, it is the maximum drain current that we can get with normal operation of JFET.
There is a maximum drain voltage [VDS (max)] that can be applied to a JFET. If the drain voltage exceeds VDS (max), JFET would break down.
The region between VP and VDS(max) (breakdown voltage) is called constant current region or active region. As long as VDS is kept within this range, ID will remain constant for a constant value of VGS. In other wards, in the active region, JFET behaves as a constant current device. For proper working of JFET, it must be operated in the active region.
Pinch off voltage (VP)
It is the minimum drain source voltage at which the drain current essentially becomes constant.
The highest curve is for VGS = OV, the shorted gate condition. For values of VDS greater than VP, the drain current is almost constant. It is because when VDS equals VP, the channel is effectively classed and does not allow further increase in drain current. It may be noted that for proper function of JFET, it is always operated for VDS > VP. However, VDS should not exceed VDS (max) otherwise JFET may breakdown.
Gate source cut off voltage VGS (off)
It is the gate source voltage where the channel is completely cut off and the drain current becomes zero.
The idea of gate source cut off voltage can be easily understood if we refer to the transfer characteristics of a JFET. As the reverse gate source voltage is increased, the cross sectional area of the channel decreases. This is turn decrease the drain current. At some reverse gate source voltage the deplection layers extend completely across the channel. In this condition, the channel is cut off and the drain current reduces to zero. The gate voltage at which the channel is cut off is called gate source cut off voltage VGS.
VGS will always have the same magnitude value as VP. For example if VP=6V, then VGS=-6V. Since these two values are always equal and opposite, only one is listed on the specification sheet for a given JFET.
There is a distinct difference between VP and VGS. Note that VP is the value of VDS that causes the JFET to become a constant current device. It is measured at VGS = 0V and will have a constant drain current = IDSS. However, VGS is the value of VGS that causes ID to drop to nearly zero.

EXPRESSION FOR DRAIN CURRENT (ID)
The relation between IDSS and VP, we note that gate source cut off voltage [i.e. VGS] on the transfer characteristic is equal to pinch off voltage VP on the drain characteristics i.e. VP = [VGS(off)]
For example, if a JFET has VGS = -4V, then VP = 4V.
The transfer characteristic of JFET is part of a parabola. A rather complex mathematically analysis yields the following expression for drain current.
ID = IDSS[1-V_GS/V_(GS(off)) ]^2
ID = drain current at given VGS.
IDSS= shorted gate drain current
VGS= gate source voltage
VGS(off)=gate source cut off voltage.
 
PARAMETERS OF JFET
Like vacuum tubes, a JFET has certain parameters which determine its performance in a circuit. The main parameters of a JFET are (i) a.c. drain resistance (ii) transconductance (iii) amplification factor.
a.c. drain resistance (rd). Corresponding to the a.c. plate resistance, we have a.c. drain resistance in a JFET. It may be defined as follows.
It is the ratio of change in drain source voltage (VDS) to the change in drain current (ID) at constant gate source voltage i.e.
a.c. drain resistance, rd = 〖∆V〗_DS/〖∆I〗_D at constant VGS
For instance, if a change in drain voltage of 2V produces a change in drain current of 0.02mA, then
a.c. drain resistance, rd = 2V/0.02mA= 100KΩ
Referring to the output characteristics of a JFET, it is clear that above the pinch off voltage, the change in ID is small for a change in VDS because the curve is almost flat. Therefore, drain resistance of a JFET has a large value, ranging 10KΩ to 1MΩ.
Transconductance (gfs). The control that the gate voltage has over the drain current is measured by transconductance (gfs) and is similar to the transconductance gm of the tube. It may be defined as
It is the ratio of change in drain current (ID) to the change in gate source voltage (VGS) at constant drain source voltage i.e.
Transconductance, gfs = 〖∆I〗_D/〖∆V〗_GS at constant VDS
The transconductance of a JFET is usually expressed either in mA/volt or micromho. As an example, if a change in gate voltage of 0.1V causes a change in drain current of 0.3mA, then,
Transconductance, gfs = 0.3mA/0.1V
= 3mA/V
=3 x 10-3 A/V or mho
=3 x 10-3 x 106µmho
= 3000µmho
Amplification factor (µ). It is the ratio of change in drain source voltage (VDS) to the change in gate source voltage (VGS) at constant drain current i.e.,
Amplification factor, µ = 〖∆V〗_DS/〖∆V〗_GS at constant ID.
Amplification factor of a JFET indicates how much more control the gate voltage has over drain current then has the drain voltage. For instance, if the amplification factor of a JFET is 50, it means that gate voltage is 50 times as effective as the drain voltage is controlling the drain current.

RELATION AMONG JFET PARAMETERS:
The relation ship among JFET parameters can be established as under.
We know µ = 〖∆V〗_DS/〖∆V〗_GS
Multiplying the numerator and denominator on R.H.S by ID, we get,
µ= 〖∆V〗_DS/〖∆V〗_GS x 〖∆I〗_D/〖∆I〗_D = 〖∆V〗_DS/〖∆I〗_D x〖∆I〗_D/〖∆V〗_GS
µ= rd x gfs
amplification factor = a.c. drain resistance x transconductance

VOLTAGE GAIN OF JFET AMPLIFIER
The JFET is self biased by using the biasing network RS-CS. The d.c. component of the drain current flowing through the source biasing resistance RS produces the desired bias voltage. The capacitor CS by passes the a.c. component of drain current. It may be noted that biasing circuit is similar to the cathode biasing for a vacuum tube. The value of RS can be determined from the following relation.
RS = V_GS/I_D
Where VGS = voltage drop across RS and ID=current through RS.
Like a vacuum tube, a JFET is a voltage driven device. Therefore, the voltage gain of a JFET amplifier can be determined in the same manner as for a vacuum tube.
Voltage gain of JFET amplifiers is
AV = (μR_L)/(r_d+R_L )
Since µ = rd x gfs
AV = (r_d g_fs R_L)/(r_d+R_L )
If rd >> RL,
Then the letter can be neglected as compared to the former.
Voltage gain, AV = (r_d g_fs R_L)/r_d
AV = gfs x RL

JFET BIASING
For the proper operation of n-channel JFET, gate must be negative w.r.t. source. This can be achieved either by inserting a battery in the gate circuit or by a circuit known as biasing circuit. The latter method is preferred because batteries are costly and require frequent replacement.
Bias battery: the biasing of an n-channel JFET by a bias battery VGG. This battery ensures that gate is always negative w.r.t source during all parts of the signal.
Biasing circuit: The biasing circuit uses supply voltage VDD to provide the necessary bias. Two most commonly used methods are
Self bias
Potential divider method
Self bias:
The resistor RS is the bias resistor. The d.c component of drain current flowing through RS produces the desired bias voltage. The capacitor CS by passes the a.c. component of drain current.
Voltage across Rs, VS =IDRS
Since gate current is negligibly small, the gate terminal is at d.c ground i.e.,
VG = 0
VGS = VG-VS = 0-IDRS
VGS = -IDRS
Thus bias voltage VGS keeps gate negative w.r.t source.
Operating point. The operating point (i.e. zero signal ID and VDS) can be easily determined. Since the parameters of the JFET are usually known, zero signal ID can be calculated from the following relation.
ID = IDSS (1-V_GS/V_P )2
VDS = VDD-ID (RD+RS)
Thus d.c conditions of JFET amplifier are fully specified.
Potential divider method
This circuit is identical to that used for a transistor. The resistor R1 and R2 from a voltage divider across drain supply VDD. The voltage V2 across R2 provides the necessary bias.
V2 = V_DD/(R_1+R_2 ) x R2
Now V2 = VGS +IDRS
VGS = V2- IDRS
The circuit is so designed that IDRS is larger than V2 so that VGS is negative. This provides correct bias voltage. We can found the operating point as under
ID = (V_2-V_GS)/R_S
And VDS = VDD – ID (RD + RS)

JFET CONNECTIONS
There are three leads in a JFET viz, source, gate and drain terminals. However, when JFET is to be connected in a circuit, we require four terminal two for the input and two for the output. This difficulty is overcome by making one terminal of the JFET common to both input and output terminals. Accordingly, a JFET can be connected in a circuit in the following three ways.
Common source connection
Common gate connection
Common drain connection
The common source connection is the most widely used arrangement. It is because this connection provides high input impedence, good voltage gain and a moderate output impedence. However, the circuit produces a phase reversal i.e., output signal is 180 out of phase with the input signal.
A common source JFET amplifier is the JFET equivalent of common emitter amplifier. Both amplifiers have a 180 phase shift from input to output. Although the two amplifiers serve the same basic purpose, the means by which they operate are quite different.

ADVANTAGES OF JFET
A JFET is a voltage controlled, constant current device (similar to a vacuum pentode) in which variations in input voltage control the output current. It combines the many advantages of both bipolar transistor and vacuum pentode. Some of the advantages of a JFET are:
It has a very high input impedence (of the order of 100M). This permits high degree of isolation between the input and output circuit.
The operation of a JFET depends upon the bulk material current carriers that do not cross junctions. Therefore, the inherent noise of tubes (due to high temperature operation) and those of resistors (due to junction transistors) are not present in a JFET.
A JFET has negative temperature coefficient of resistance. This avoids the risk of thermal runway.
A JFET has a very high power gain. This eliminates the necessary of using driver stages.
A JFET has smaller size, longer life and high efficiency.

JFET APPLICATIONS
The high input impedence and low output impedence and low noise level make JFET for superior to the bipolar transistor. Some of the circuit applications of JFET are
(i) As a buffer amplifier. A buffer amplifier is a stage of amplification that isolates the preceding stage from the following stage. Because of the high input impedence and low output impedence, a JFET can act as an excellent buffer amplifier. The high input impedence of JFET means light loading of the preceding stage. This permits almost the entire output from first stage to appear at the buffer input. The low output impedence of JFET can drive heavy loads (or small load resistances). This ensures that all the output from the buffer reaches the input of the second stage.
(ii) Phase shift oscillators. The oscillators will also work with JFETs. However, the high input impedence of JFET is especially valuable in phase shift oscillators to minimize the loading effect.
(iii) As RF amplifier. In communication electronics, we have to use JFET RF amplifier in a receiver instead of BJT amplifier for the following reasons.
The noise level of JFET is very low. The JFET will not generate significant amount of noise and is thus useful as an RF amplifier.
The antenna of the receiver receives a very weak signal that has an extremely low amount of current. Since JFET is a voltage controlled device, it will well responds to low current signal provided by the antenna.

CONCLUSION
Though in its operation has high input impedence because of insulation at the gate and low output impedence, these are used as voltage amplifier.
 
BIBLIOGRAPHY:-

Principles of Electronics
By V.K.Mehta
Rohit Mehta
Foundation of Electronics
By P.C.Chottopadhay